1. Field of the Invention
The present invention relates to a method of etching the back of a semiconductor wafer, and particularly to a method of etching the back of a semiconductor wafer, which prevents an etchant from getting around into the semiconductor wafer upon etching the back of the semiconductor wafer to form a thin wafer.
2. Description of the Related Art
A semiconductor chip used for an IC card needs to extremely thin the thickness of the chip according to its use forms and enhance strength with respect to bending of the IC card because there is a possibility that the IC card will be bent for use. Therefore, there is a need to provide a specific process for processing a chip into a thin form in addition to a process used in a normal semiconductor device manufacturing method.
After semiconductor elements have been formed on a silicon wafer, there is a need to execute backetch for chemically etching the back of a normal wafer with chemicals subsequently in addition to mechanical grinding (background) of the wafer back, which has been effected on the normal wafer. Since the wafer is mechanically cut in the backgrind process, innumerable fine irregularities and distortion occur in the back of the wafer subsequent to the backgrind.
When the wafer is bent in this state, a stress developed due to its bending concentrates on concave and convex portions or distorted portions to thereby make the wafer fragile. The backetch serves so as to remove a surface layer of the wafer back formed with the concave and convex portions or distortion developed in the vicinity thereof and simultaneously smooth the concave and convex portions. As a result, the thickness of the wafer can be extremely thinned while a bending strength is being maintained.
After the semiconductor elements have been formed on the wafer surface side via the normal wafer process, the wafer back is back-ground. FIG. 1 is a schematic diagram of a wafer as viewed on a plan basis. A large number of semiconductor chips 102 are formed on a wafer 101. Semiconductor chips 104 formed only as some of the chips exist at a wafer end 103 around the wafer.
After the elapse of the proper time, backetch for chemically etching the back of the wafer is carried out. FIG. 2 typically shows an outline of a backetch process section. Chemicals 202 are sprayed from the back of a wafer 201 to etch a wafer back 203. A nitrogen gas 205 is supplied to a wafer surface 204 so that the chemicals 202 do get around into the surface of the wafer. After the completion of the backetch, the wafer formed with a large number of chips is divided into individual semiconductor chips by cutting chip-to-chip scribe lines.
However, the chemicals used in the backetch get around into the surface side of a wafer peripheral portion in the conventional backetch process, and hence the peripheral portion of the wafer surface is locally etched. Therefore, a problem arises in that when a force is applied to the etching portion upon handling of the wafer, stress concentration occurs, so that the wafer breaks up.
FIG. 3 is an enlarged view of the peripheral portion of the wafer in FIG. 1. As shown in FIG. 3, semiconductor chips 301 each formed in a complete form, and semiconductor chips 303 each formed in an incomplete form because of being located at a wafer end 302, exist on the wafer. The respective chips are separated from one another by scribe lines 304.
A semiconductor chip is normally formed with a passivation film at the top layer to protect an internal circuit from moisture in the air, contamination, etc. The passivation film makes use of an oxide film (SiO2) or a nitride film (SiN) or the like having high insulating properties and a moisture penetration control capability. The passivation film is formed so as to cover a whole area surface except for electrode withdrawal portions such as pads.
However, such a structure as not to leave the passivation film behind is normally used in each of scribe-line portions to avoid moisture-resistance degradation due to fly-off of the passivation film and its crack intrusion upon cutting of the scribe-line portions at the division of the chips. This is because there is a possibility that the passivation film will fly off to thereby cover the electrode withdrawal portions in the chip cutting process, and a failure in connection will occur in its subsequent wiring connecting process.
Meanwhile a problem arises in that in the backetch process, the chemicals 202 fly off toward the wafer periphery, whereas at the end of the wafer, the intrusion of the chemicals 202 round into the wafer surface as designated at numerals 206 will occur. The chemicals 206 make use of one which etches a silicon wafer 201 and has such a characteristic as not to etch an oxide film and a nitride film. However, when the chemicals get around into the wafer surface from the end of the wafer, only ends of scribe lines are etched as designated at numerals 305 in FIG. 3 because silicon is exposed.
As a result, a problem arises in that the possibility that when the wafer is distorted due to wafer conveying, absorption and handling or the like in respective manufacturing/detecting processes subsequent to the backetch, and stresses concentrate on the scribe-line ends, the wafer will crack, becomes extremely high. Thus, manufacturing yields are significantly degraded.